Senior Digital Verification Engineer


Ref: 1068Friday 3 May 2019

Up to £55,000 + benefits

This vacancy is now closed
Enigma People Solutions is recruiting a Senior Digital Verification Engineer for our international client that develops state-of-the-art automotive power integrated circuits. Become a permanent member of an innovative, open, friendly and collaborative team that is enjoying growth and new projects.
Why join?
Over the past 3 years of working with this client, I can tell you that they have doubled in size and are still growing. Company owners and board of directors have sung the praises about this particular design centre and are committed to grow it further by additional funding and by providing cutting edge technology to the team. You will work closely with systems engineers and have the opportunity to influence the company's product and technology directions. My client is committed to hire the best talent, so you can rest assure you’ll be working with bright professionals who are passionate about their work.
The Job
You will be part of a new team that collaborates on the verification of embedded SoCs based on innovative new core architectures. As a senior member of the SoC development team, you will be responsible for developing verification plans based on microarchitecture specifications and using SV/UVM based verification environments to meet the required coverage metrics. You will be expected to liaise internally with verification team members along with digital, analogue, layout and systems group team members as well as with design centres worldwide.
  • Languages: System Verilog, Verilog, UVM/OVM, Specman, C/C++, ASM, TCL/TK, Python
  • Microprocessors: ARM Cortex-M.
  • Digital design experience with RTL coding and SCAN methodologies
  • Knowledge of the embedded SoC design and verification life-cycle with an emphasis on design verification tasks such as: test plan development, test bench creation, test coverage analysis and debug of unexpected design behaviour.
  • Knowledge of CPU, Memory or I/O Subsystem microarchitectures (caches, virtual memory, DMA, memory access optimizations).
  • Experience identifying functional coverage conditions based on microarchitecture specifications
  • Experience of System Verilog digital & mixed-signal verification.
  • Experience of script generation for processing results as well as regression control configuration
For full job description and to submit your CV today, contact Matt via